Consider a virtual memory system using a 3-level page table where the parameters n and p are 48 and 17, respectively. The size of the DRAM is 4GB. The number of bits of virtual address used for indexing into the first- and the second-level page tables are 10 and 10, respectively. Suppose each page table entry in the outermost level is 8 bytes long. How much memory is required for the page tables translating the user portion of the address space when the process address space looks as follows:

The stack grows downwards from address 0xCFFFFFFFFFFF and is of size 15 MB

Question23:

You go to Best Buy and find two computers on sale both for $499. You would like to purchase the one that will be faster for your processes (collectively “workload”). 10% of the instructions in your workload are memory instructions. You choose to apply ideas from CMPSC 473 to compare their cycles per instruction (CPI).

Computer A has an older CPU (slower and no hardware cache) but uses a faster Flash-based swap disk.

Computer B has a faster CPU with an L1 cache but a S.L.O.W. magnetic disk:

What average CPIs do you estimate these computers might offer you? Which one will you buy?